Wednesday, September 22, 2010
High and Low Vt Cells and 5 important Design techniques
1) What are High-Vt and Low-Vt cells?
Ans: Hvt cells are MOS devices with less leakage due to high Vt but they have higher delay than low VT, where as the low Vt cells are devices, which have less delay, but leakage is high. The threshold (t) voltage dictates the transistor switching speed, it matters how much minimum threshold voltage applied can make the transistor switching to active state, which results to how fast we can switch the transistor. Disadvantage is it needs to maintain the transistor in a minimum sub threshold voltage level to make it switch fast so it leads to leakage of current in turn loss of power.
2) Give 5 important Design techniques you would follow when doing a Layout for Digital Circuits
1) In digital design, decide the height of standard cells you want to layout. It depends upon how big your transistors will be. Have reasonable width for VDD and GND metal paths. Maintaining uniform Height for all the cell is very important since this will help you use place route tool easily and also incase you want to do manual connection of all the blocks it saves on lot of area.
2) Use one metal in one direction only; this does not apply for metal 1. Say you are using metal 2 to do horizontal connections, and then use metal 3 for vertical connections, metal4 for horizontal, metal 5 vertical etc...
3) Place as much substrate contact as possible in the empty spaces of the layout.
4) Do not use poly over long distances as it has huge resistances unless you have no other choice.
5) Use fingered transistors as and when you feel necessary.
6) Try maintaining symmetry in your design. Try to get the design in BIT Sliced manner.